DK Design Suite

Rapid path from C to FPGA implementation

The DK Design Suite dramatically simplifies the path from signal processing algorithm in C to FPGA implementation. DK's C-based synthesis technology, platform abstraction layers (PAL) and pre-built libraries make it a breeze to map an algorithmic C onto an FPGA. When combined with the Agility RC platform, users now have a complete algorithm prototyping solution. DK's development environment also provides the capability to explore and optimize implementations to meet real-time requirements. 

Flexibility of C with powerful synthesis directives

The power of DK Design Suite comes from the C-based development environment enabling the developer to direct the C synthesis for uncompromised Quality of Results while offering enhanced productivity. To make effective use of the target FPGA, DK uses Handel-C, a variant of C that includes parallelism and hardware resources constructs in the language. 

DK Design Suite maintains a single source for simulation and implementation giving the developer a fast, automated solution from algorithm change to new implementation.

Production proven

Since introduction in 2002 DK Design Suite has produced thousands of FPGA prototypes and implementations for a variety of applications. With more than 15 years of R&D investment and hundreds of installed users, DK Design Suite has the advantage maturity brings with complete training courses, design libraries, template designs and user documentation while continuing to push the state-of –the-art on C to FPGA synthesis.

Makes FPGAs easy to use

DK Design Suite combined with Agility RC platforms and design libraries removes the majority of time consuming details that must be scheduled and considered when using a custom FPGA approach. With DK developers are free to focus on the actual task whether it is rapid prototyping, performance tuning or product implementation. With DK, algorithm implementation to FPGA hardware can be performed by software development teams, and design schedules are reduced from months to weeks.

Rapid prototyping

Developers using DK can take advantage of Agility’s range of design libraries and template designs to deliver a prototype in less time. These proven starting points called Platform Developer’s Kits (PDK) augmented with optimized function libraries and the DK Design Suite environment enable developers to quickly achieve the functionality and performance required for the prototype. Some of the template designs available include: examples for using RC platform peripherals (Ethernet, touchscreen, USB, etc.) and complete algorithm examples (Mandelbrot, Ping, Life, etc.).

Performance Tuning

DK Design Suite has a number of features to help optimize implementations to meet real-time constraints. DK reports comprehensive design information including source code profiling with detailed time/area estimations to allow for quick experimentation with different optimization strategies. DK's synthesis can take advantage of specific FPGA architectural features like ALU primitives and memory accesses. Additionally, timing constraints can be set for I/O signals and circuits can be retimed to meet timing goals.

Product Implementation

Once the algorithm is validated, the focus turns to implementation and integration into the final product. DK supports both hand-off and integration of the design. Hand-off is supported in the form of EDIF (which can be used directly by FPGA vendor place and route tools) or standard HDL descriptions in either Verilog or VHDL for use with 3rd party synthesis tools and simulators. DK integrates with leading model-based system design tools like the MathWorks Simulink® and connects to leading processor instruction set simulators, SystemC and HDL simulators.

Benefits

Key Features

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